A high pressures sensor is usually composed of a pressure sensing element for pressure sensing, an application-specific integrated circuit (ASIC) for amplification and compensation, a port to resist high pressure and fluid corrosion and for the mounting of a pressure sensing element, and a connector for the voltage input and output. For the new device of interest, only the pressure sensing element, port, and their packaging are described herein for purposes of illustration. FIG. 1 shows a cross-sectional diagram of a prior art high pressure sensor device 100. The high pressure sensor device 100 is comprised of a port 102 in which a flat-bottomed hole 104 is formed. The port 102 is preferably made of metal.
The port 102 is designed to be threaded into a hole. Threads 105 are thus formed onto the outside surface 106 of the lower portion 108 of the port 102 and which enable the sensor 100 to be screwed into a mating threaded hole.
The hole 104 has an open end 110 through which fluid can flow into the hole 104. Fluid in the hole 104 is under pressure. The pressurized fluid thus exerts force on the relatively flat bottom end surface 112 of the hole 104.
The diaphragm 114 between the bottom end surface 112 and the top surface 116 of the port 102 is relatively thin and typically about from 0.5 to 1.5 mm in thickness depending on the pressure range and the size of the hole 104. When the diaphragm 114 deflects upwardly and downwardly responsive to the pressure applied to the bottom end surface 112, the top surface 116 of the diaphragm deflects responsive to pressure changes in the hole 104.
The deflections of the top surface 116 of the port 102 deform a piezoresistive pressure sensing element 118 attached to the top surface 116 of the port 102 near the edge of the diaphragm 114. The pressure sensing element 118 made of a thin single crystalline silicon (Si) is embedded into a glass frit 124. The glass frit 124 is attached to and sits atop the top surface 116 of the port 102 near the diaphragm edge as shown in FIG. 1. The glass frit 124 has a thickness of about fifty microns, i.e., 50×10−6 meters. On the top surface 126 of the pressure sensing element 118, four piezoresistors are formed and connected to each other to form a Wheatstone bridge for pressure sensing as shown in FIG. 2.
Merriam-Webster's Collegiate Dictionary 11th Edition defines a Wheatstone bridge as an electrical bridge consisting of two branches of a parallel circuit joined by a galvanometer and used for determining the value of an unknown resistance in one of the branches. As used herein, the term Wheatstone bridge refers to the circuit topology shown in FIG. 2, namely the parallel connection of two series-connected resistors.
FIG. 2 is a top view of the piezoresistive pressure sensing element 118 with a dimension of 800 um×800 um×15 um. The pressure sensing element 118 is processed using conventional techniques to form four resistors 202-1 through 202-4 in the top surface 126 of the pressure sensing element 118. The resistors 202-1 through 202-4 are formed of a p-material, embodiments of which are well-known to those of ordinary skill in the semiconductor art. Electrical interconnects 204 made of p+ material connected to the bottom of bond pads 206 are also formed on the top surface 126 of the pressure sensing element 118. Each interconnect 204 provides an electrical connection between two resistors in order to connect the resistors to each other to form a resistive Wheatstone bridge circuit.
Four interconnects 204 are shown on the top surface 126. Each interconnect 204 extends outwardly from a point or node 205 between two of the four resistors 202 next to each other, and connects to the bottom of a metal bond pad 206. Each bond pad 206 is considered to be located “in” or proximate to, a corresponding corner 208 of the top surface 126 of the pressure sensing element 118. Each interconnect 204 thus terminates at and connects to a bond pad 206.
FIG. 2 also shows an orientation fiducial 210 on the top surface 126. The fiducial 210 is a visually perceptible symbol or icon the function of which is simply to enable the orientation of the pressure sensing element 118.
Each bond pad 206 has a different label or name that indicates its purpose. The bond pad 206 located in the lower-right corner and the bond pad 206 in the upper-left corner receive an input or supply voltage for the Wheatstone bridge circuit. Those two bond pads are denominated as Vp and Vn, respectively. The other two bond pads are output signal nodes denominated as Sp and Sn, respectively.
A well-known problem with prior art pressure sensors that attach a pressure sensing element 118 to a diaphragm 114 using a glass frit 124 is that one or more voids can be formed in the glass frit after the glass firing process. FIG. 3A is cross-sectional view of a prior art glass frit 124 having a void 302 in the glass frit 124 and immediately below a pressure sensing element 118. FIG. 3B is a top view of the structure shown in cross-section in FIG. 3A. The location of the interfacial void 302 can be seen in FIG. 3B to be offset from the center of the pressure sensing element 118. The location of the void 302 between the pressure sensing element 118 and the glass frit 124 is considered herein to be asymmetric. It is however, located under only one of the resisters 202. Both the experimental measurement and computer simulations of the structure depicted in FIGS. 3A and 3B show that the void 302 creates offset voltage output and its variation over an operating temperature range due to asymmetrical thermal stresses on the resistors. The void 302 causes one of the resistors 202-1 through 202-4 to deform or change its value asymmetrically with respect to the other resistors leading to an offset voltage output variation in an operating temperature range in the sensor output. The offset voltage output variation over an operating temperature is called temperature coefficient of offset voltage output (TCO) and defined as followTCO=(Vo at 140° C.−Vo at −40° C.)/180° C.Where
Vo at 140° C.: offset voltage output at 140° C. without pressure applied
Vo at −40° C.: offset voltage output at −40° C. without pressure applied
Usually we want to keep the TCO between −50 uV/° C. and 50 uV/° C. so the ASIC can handle a thermal noise better.
The high offset voltage output variation over the temperature (or TCO) is difficult for an ASIC to compensate. An apparatus for reducing the TCO of the sensor having voids in the glass frit would be an improvement over the prior art.